1. Field of the Invention
The present invention relates to the field of semiconductor wafer processing and, more particularly, to a compliant chuck for supporting a wafer in a processing chamber.
2. Background of the Related Art
Various processing chambers are known in the art for processing semiconductor wafers, such as silicon wafers. Present practices include the manufacture of integrated circuit devices on the wafer by fabricating multiple levels of conductive (typically metal) layers above a substrate of the wafer. The multiple metallization layers are employed in order to accommodate higher densities as device dimensions shrink. Likewise, the size of interconnect structures also need to shrink in order to accommodate the smaller dimensions. The various processing chambers are utilized to deposit or remove materials in order to fabricate the integrated circuits. For example, Reposition techniques include processes such as physical vapor deposition (PVD), chemical vapor deposition (CVD), sputtering, and immersion of the wafer in an electrolyte. Similarly, a number of techniques are known for removing a material from a wafer. These techniques include reactive ion etching (RIE), plasma etching, chemical-mechanical polishing (CMP), and immersion of the wafer in an electrolyte.
Typically, the practice involves the complete placement of a wafer or wafers in the processing chamber. In single wafer processing, the wafer is typically placed on a chuck, which resides or is made to reside within the confines of the chamber. The chuck may be rotated to rotate the wafer. The chucks provide a hard upper surface upon which the wafer resides. The chuck is positioned so that all of the wafer resides within the interior walls of the processing chamber.
However, another line of processing chambers utilize the wafer to form the floor of the containment area for the processing fluid. For example, in a processing chamber described in U.S. Patent Application entitled "Process chamber and Method for Depositing and/or Removing Material on a Substrate;" Ser. No. 08/916,564; filed Aug. 22, 1997; and assigned to the assignee of this application, a processing surface of the wafer forms the floor of the inner containment chamber, which holds the processing fluid for processing the exposed wafer surface. Another example of a processing chamber in which the wafer forms the floor of the containment vessel is described in U.S. Patent Application entitled "Method and Apparatus for the Disposal of Processing Fluid Used to Deposit and/or Remove Material on a Substrate;" Ser. No. 09/118,362; filed Jul. 17, 1998; and also assigned to the assignee of this application.
In both examples, the processing fluid is an electrolyte for processing the wafer. The electrolyte is retained in the confined area bounded by the sidewalls and the wafer, which wafer forms the base or floor of the confined area. In order to achieve this confinement, the sidewalls (at least a portion of it) mate to the periphery (edge) of the wafer. Generally, once the wafer is placed upon a chuck, the chuck and the wafer are raised until the wafer edges mate to the bottom surface of the sidewalls of the containment vessel. A sealing, such as an O-ring, is typically required to hold the fluid within the vessel and/or to protect electrodes, where electrodes are mated to the outer edge of the wafer.
In practice, the sidewall bottom surface contacting the wafer should be minimized to a narrow region at the edge of the wafer. Since this region of the wafer would not be processed for fabricating the integrated circuit devices, chip manufacturers typically want to limit the non-processing area as small as possible. Minimizing the edge waste area, requires a thin (or narrow) O-ring to contact the edge of the wafer to form a seal. However, thin O-rings are more susceptible to leakage and less fluid pressure can be applied on them.
In order to maintain tight seal integrity around the circumference of the wafer's edge where the sidewall joins the wafer surface, the mating boundary between the sidewall and the wafer's surface cannot exceed a given tolerance. Yet, due to misalignment, tolerance imperfections, pressure changes within the vessel, O-ring wear, as well as for other reasons, it is difficult to maintain tight seal integrity at the boundary. This is further complicated when a thin O-ring is used. Maintaining this degree of tolerance is difficult, if not impossible, to achieve using thin O-rings. The direct impingement of the processing fluid on the O-ring often causes the O-ring to deteriorate. Also, with thinner O-rings the seal integrity breakdown can occur at much lower pressure. The leakage of the fluid can adversely affect the performance of the system, since the fluid can contact the backside of the wafer itself and/or the electrodes contacting the edge of the wafer (if such electrodes are present)
These problems are caused by the difficulty in properly sealing the containment sleeve on to the wafer's surface. The problem is amplified when larger diameter wafers are being processed, since the contact area is over a larger circumference. Since the wafer is residing on a flat rigid surface of the chuck, the wafer is not flexible to adjust to any gap separation distance which exceeds the tolerance. Improper alignment of the wafer and/or the chuck can also cause a gap separation to widen.
Accordingly, what is needed is a scheme in which unwanted sidewall-wafer gap separation is reduced or prevented when semiconductor wafers are processed in a processing chamber, especially where the wafer forms the floor of the containment region.